Blar i Institutt for elektroniske systemer på emneord "Elektronikk, Design av digitale systemer"
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A JPEG2000 Encoder Interpretation
(Master thesis, 2018)Students at the Norwegian University of Science and Technology (NTNU) are developing a CubeSat through the Orbit project. The on-board image compression system will be implemented on an FPGA. Continuing from previous work, ... -
Analysis and Visualisation of Clock Tree Power in a full-chip-design
(Master thesis, 2014)In this thesis a tool to graph power density in a chip by combining placement data with power estimation results has been made for Nordic Semiconductor. The goal was to utilize the data generation power of the power ... -
Analysis of Design Parameters in a Musical Dual Resonant Solid State Tesla Coil
(Master thesis, 2017)Universities, science centers and other institutions has the need for equipment that demonstrates physical phenomena in interesting and audience friendly ways. An example of this is a Double Resonant Solid State Tesla Coil ... -
Applicability of the Residue Number System in a Radio Receive Chain
(Master thesis, 2016)This thesis explores the residue number system and how it can be used in a radio receiver. In this number system the numbers are divided up into several residues. Each of these residues is associated with one particular ... -
Applying a Digital Verification Approach to an Analog Protocol - Further development of a reusable verification component based on the Universal Verification Methodology
(Master thesis, 2016)Analog and mixed-signal circuit designs are more important now than ever, due to the popularity of wearable and wireless electronic devices. The forecast of the Internet of Things (IoT) suggest that the need for advanced ... -
Channel Filter Cross-Layer Optimization
(Master thesis, 2015)The recent raise of Internet of Things has increased the demand of energy-efficient wireless devices. However, the design process of a low-energy, high-performance device for all operational cases is not trivial. Thus, in ... -
Clock Tree Power Analysis
(Master thesis, 2016)The buffered clock tree structure is commonly used to distribute the clock signal to the memory elements in digital circuits. Since the clock signal is used as a temporal reference, it has to be distributed to the registers ... -
Design and Implementation of a High Resolution, Discrete-Time Delta-Sigma ADC
(Master thesis, 2018)This thesis do a study on delta-sigma type A/D converters to find good trade-offs and optimize a design for high resolution conversion in embedded applications. The main objective is to define a state of the art high-resolution ... -
Design and Testing of a Race Car Inverter
(Master thesis, 2016)This Master s Thesis will present the design, implementation and testing of a two-level voltage source inverter and motor control system. The target vehicle is driven on all four wheels, so a four channel inverter system ... -
Design of a near-threshold Microcontroller
(Master thesis, 2016)There is a strong interest in ultra low voltage digital design as emerging applications like Internet of Things, wearable biomedical sensors, radio frequency identification, sensor networks and more are gaining traction. ... -
Design of a Single-Precision Floating-Point Square Root Unit for use in a Hardware Ray Tracer
(Master thesis, 2018)A unit for calculating square root and inverse square root of 32-bit floating-point numbers was designed using SystemVerilog. The unit was made to be incorporated into an existing design for a hardware ray tracer in order ... -
Design of an ASIC Evaluation Kit - Conceptualization, schematic design, PCB layout and preliminary testing of a mixed-signal board
(Master thesis, 2015)The development of an upcoming ASIC by the company IDEAS calls for the design of an accompanying evaluation kit so that it may be accessible for testing in a laboratory setting. In addition to supporting the ASIC in question, ... -
Development of a prototype of a candidate camera payload
(Master thesis, 2016)The second prototype for the NUTS camera module have been tested to confirm if changes made from the first prototype were successful. The first prototype suffered from noise issues when operating at the maximum clock ... -
Development of a Universal Verification Component for CPU UVM Verification
(Master thesis, 2018)The time used debugging and developing testbenches in FPGA and ASIC/IC projects is around 60% of the total time spent in verification. The last years has shown an increase in the adoption of the Universal Verification ... -
Doppler radar speed measurement on board - digital signal processing
(Master thesis, 2013)Abstract Doppler radars have been widely used in many different fields, such as traffic control, weather prediction, navigation, satellite tracking, Airborne Early Warning systems and missile guidance. The technology ... -
DPA-Resistant ASIC implementation of AES
(Master thesis, 2015)With the increased proliferation of small embedded systems connected to the internet and the internet-of-things, the security concerns becomes increasingly important. Encryption, and the protection of encrypted circuits ... -
Efficient Streaming and Compression of Hyperspectral Images
(Master thesis, 2018)As a part of the SmallSat project at NTNU, a satellite payload capable of capturing and processing of hyperspectral images is being developed. Several processing steps are performed on-board in the satellite, as well as ... -
Efficient Verification with Portable Stimulus
(Master thesis, 2018)Portable Stimulus is an upcoming technique for increasing productivity and quality of verification of digital designs. A single test description shall be used to generate tests between multiple abstraction levels and ... -
Energy Efficient True Random Number Generator
(Master thesis, 2015)For modern cryptography, the availability of true random numbers is indispensable. While recent technology trends require secure communication, they combine this requirement with the need for energy efficient solutions. ... -
Exploring the Use of IP-XACT in a TLM Environment
(Master thesis, 2017)As both semiconductor technology and industry evolves, the need for robust methodologies and efficient design flows becomes more and more important. This thesis investigates IP-XACT, which is a standard that describes ...