Design of a near-threshold Microcontroller

Abstract

There is a strong interest in ultra low voltage digital design as emerging applications like Internet of Things, wearable biomedical sensors, radio frequency identification, sensor networks and more are gaining traction. This thesis describes the implementation, synthesis and testing of a microcontroller using a near-threshold library. The system has been described in VHDL and synthesized for near-threshold operation on 28 nm FDSOI production technology from STmicroelectronics. The microcontroller implements a 32 bit RISC-V subset compatible pipelined processor and has SPI connectivity. Two single port 2kB SRAM modules are used as RAM. A power gating technique that reduces the static power in an ALU during runtime has been implemented and compared to a traditional ALU. Traditional coarse grain power gating of the processor has also been implemented. Using a supply voltage of 350 mV and a clock speed of 1 MHz the schematic SPICE simulation reported an average power consumption of 4.42 uW during program execution. In power gated mode the microcontroller consumed 2.98 uW. In a sensor logging program the average energy per executed instruction was 4.91 pJ. Runtime power gating reduced the average energy consumption of the ALU with 58 - 57% with a propagation delay penalty of 346 - 143% depending of the sizing of the power gating transistors.