Blar i Institutt for elektroniske systemer på tittel
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Design av trefase vekselretter og motorkontroller til synkronmotor
(Bachelor thesis, 2021)Oppgaven dokumenterer utviklingen av en vekselretter-prototype og motorkontroller for en børsteløs DC-motor. Prototypen er laget for Revolve NTNU, og skal i fremtiden kunne brukes som styresystem for organisasjonens førerløse ... -
Design Considerations for a Low-Power Control-Bounded A/D Converter
(Master thesis, 2021)Kontrollbegrenset analog-til-digital omforming (control-bounded ADC) er et nylig introdusert konsept som skiller seg fundamentalt fra de fleste konvensjonelle omformingsarkitekturer. De lovende egenskapene ved disse ... -
Design Issues and Performance Analysis for Opportunitistic Scheduling Algorithms in Wireless Networks
(Doktoravhandlinger ved NTNU, 1503-8181; 2007:27, Doctoral thesis, 2007)This doctoral thesis is a collection of six papers preceeded by an introduction. All the papers are related to design issues and performance analysis for opportunistic scheduling algorithms in cellular networks. Opportunistic ... -
Design of a 20W GaN MMIC Doherty Power Amplifier for the Frequency Range 4400MHz - 5000MHz
(Master thesis, 2016)The Doherty Power Amplifier architecture is becoming increasingly popular for many RF producers because of its enhanced efficiency characteristics compared to traditional amplifier classes. One major constraint of practical ... -
Design of a 5.8 GHz Multi-Modulus Prescaler
(Master thesis, 2006)A 64-modulus prescaler operating at 5.8 GHz has been designed in a 0.18 μm CMOS process. The prescaler uses a four-phase high-speed ÷4 circuit at the input, composed of two identical cascaded ÷2 circuits implemented in ... -
Design of a 5.8 GHz Multi-Modulus Prescaler
(Master thesis, 2006)A 64-modulus prescaler operating at 5.8 GHz has been designed in a 0.18 μm CMOS process. The prescaler uses a four-phase high-speed ÷4 circuit at the input, composed of two identical cascaded ÷2 circuits implemented in ... -
Design of a Conformal Ground Surveillance Radar (GSR) Antenna
(Master thesis, 2013)Ground Surveillance Radar (GSR) requires a phased array, conformal cylindricalantenna solution that has specific features (electronically scan the azimuth andelevation, with angular width of ca. 6° in both directions, and ... -
Design of a Doherty power amplifier for satellite TTC (Telemetry and TeleCommand) Transmitters
(Master thesis, 2011)Det er denne oppgåva blitt designa ein djup klasse-AB effektforsterkar og ein klasse-C forsterkar for å bruke dei i ein dohertykonfigurasjon. Å få til ein doherty med 15 % relativ båndbredde viste seg å vera svært ... -
Design of a fractal generator for on-the-fly generation of textures for Mali GPU
(Master thesis, 2011)The Mandelbrot set, shown on the front page of this report, is perhaps themost well-known example of a fractal. Fractals is a certain familyof shapes with a very distinctive, interesting shape. The term was coined byBenoit ... -
Design of a Harmonically Tuned Two-Stage Broadband Power Amplifier in Discrete GaN Technology - A Harmonic Loadpull and Harmonic Termination Approach
(Master thesis, 2018)In this master's thesis a two-stage broadband power amplifier, along with the corresponding separate driver and power stages, has been designed with an in-depth analysis of the harmonic source- and loadpull methods and the ... -
Design of a high IIP2 2.4GHz RF Front-end
(Master thesis, 2006)This master thesis presents the design of a high IIP2 direct-conversion receiver front-end, consisting of a LNA and I- and Q-channel mixers. The front-end is implemented in a 0.18 μm technology with 1.8V supply voltage. ... -
Design of a Light and Compact Antenna Element for Ultrawideband Digital Arrays
(Master thesis, 2018)This report contains the design of a tightly coupled dipole array (TCDA) ultrawideband antenna element with an integrated Marchand balun made for digital phased arrays. The element is manufactured and measured as part of ... -
Design of a Linear FMCW Radar Synthesizer with Focus on Phase Noise
(Master thesis, 2012)The linear FMCW radar has become more popular in recent years mainly due toadvances in digital signal processing and the good performance of the radar at closeranges. What puts limits to the performance is mainly phase ... -
Design of a low-cost CC-VFC for one-celled Li-Ion batteries
(Master thesis, 2007)The Lithium-ion battery is today used by close to every portable battery powered device, and this marked is constantly increasing because not only are the products the consumer have had for years getting more and more ... -
Design of a near-threshold Microcontroller
(Master thesis, 2016)There is a strong interest in ultra low voltage digital design as emerging applications like Internet of Things, wearable biomedical sensors, radio frequency identification, sensor networks and more are gaining traction. ... -
Design of a phased array antenna for a DVB-T based passive bistatic radar
(Master thesis, 2014)This thesis was initiated by the Norwegian Defence Research Establishment's military air surveillance project on passive radar systems. The main objective of the thesis is the design of a phased array antenna for a DVB-T ... -
Design of a practical and compact mm-wave MIMO system with optimized capacity and phased arrays
(Journal article; Peer reviewed, 2014)In this paper we evaluate the feasibility of short range outdoor mm-wave MIMO links in the 70 GHz portion of the E-band (71–76 GHz). We use phased arrays in order to strongly reduce the impact of the multipath components, ... -
Design of a residue amplifier for a SAR-assisted pipeline ADC
(Master thesis, 2017)This thesis explores the use of the ring amplifier in 28 nm FDSOI. The intended use is as a residue amplifier in a SAR (successive approximation register) assisted pipeline ADC. The specifications for the ADC are 13 effective ... -
Design of a Single-Precision Floating-Point Square Root Unit for use in a Hardware Ray Tracer
(Master thesis, 2018)A unit for calculating square root and inverse square root of 32-bit floating-point numbers was designed using SystemVerilog. The unit was made to be incorporated into an existing design for a hardware ray tracer in order ... -
Design of a Snoop Filter for Snoop Based Cache Coherency Protocols
(Master thesis, 2013)Multi core architectures has become common in mobile SoCs; not only for CPUs, but also for mobile GPUs. With the introduction of OpenCl for mobile GPU architecture, the SoCs are able to become more powerful than before. ...