FPGA implementation of an efficient high-speed DVB-S2X block-interleaver

Vassiliev, Youri Vladimirovitch
Master thesis
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URI
http://hdl.handle.net/11250/2562787
Date
2018
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Abstract
In this Master's Thesis a new DVB-S2X block-interleaver is presented that uses only one block of memory.
Publisher
NTNU