FPGA implementation of an efficient high-speed DVB-S2X block-interleaver
| dc.contributor.advisor | Kansanen, Kimmo | |
| dc.contributor.author | Vassiliev, Youri Vladimirovitch | |
| dc.date.accessioned | 2018-09-14T14:02:39Z | |
| dc.date.available | 2018-09-14T14:02:39Z | |
| dc.date.created | 2018-07-05 | |
| dc.date.issued | 2018 | |
| dc.identifier | ntnudaim:20080 | |
| dc.identifier.uri | http://hdl.handle.net/11250/2562787 | |
| dc.description.abstract | In this Master's Thesis a new DVB-S2X block-interleaver is presented that uses only one block of memory. | |
| dc.language | eng | |
| dc.publisher | NTNU | |
| dc.subject | Elektronikk, Signalbehandling og kommunikasjon | |
| dc.title | FPGA implementation of an efficient high-speed DVB-S2X block-interleaver | |
| dc.type | Master thesis |
