Blar i Institutt for elektroniske systemer på forfatter "Aas, Einar Johan"

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    • Accurate Delay Test of FPGA Routing Network by Branched Test Paths 

      Dikkanen, Elena Davydova (Master thesis, 2007)
      This Master s thesis documents a new test method for detection of small delay faults in FPGA routing network. The main purpose of the test is accurate detection of faults in all parts of the network. The second aim is ...

    • Analysis and Implementation of the Asynchronous 2-Phase Single-Rail Protocol in the Balsa Synthesis System 

      Drotninghaug, Bjarne (Master thesis, 2011)
      This thesis documents the design, verification and benchmarking of a new set of handshake components for the Balsa synthesis system. The handshake components employ the 2-phase single-rail asynchronous communication protocol. ...

    • Asynchronous design of CPU elements 

      Koch, Kristoffer Ellersgaard (Master thesis, 2010)
      The clock in digital circuits often cause large portions of the power consumption. Designing circuits without clocks, asynchronous circuits, has been proposed as a method to save power. It is also important to study ...

    • Automatic synchronous-to-asynchronous circuit conversion 

      Mandt, Erik Arne (Master thesis, 2010)
      One of the major challenges with today s ASIC designs is not necessarily the performance in terms of speed, but rather their power consumption. This is becoming increasingly important as the demands for mobile devices are ...

    • Built-in Self-Test (BIST) for SRAM in Deep Sub-Micron 

      Jensen, Erlend Furuset (Master thesis, 2010)
      This thesis is a study of the fault mechanisms in static random access memories (SRAMs) and an implementation of a built-in self-test (BIST) module for these memories. Special emphasis has been put on the state-of-the-art ...

    • Defect Pixel Correction 

      Næs, Eirik Skogestad (Master thesis, 2010)
      A problem with image sensors today, is that they contain defect pixels. By utilizing an image processing algorithm for defect pixel correction, image quality can be increased and costs per produced sensor can be reduced.This ...

    • Defective Pixel Correction 

      Backe-Hansen, Henrik (Master thesis, 2010)
      When using CMOS technology for image sensors, there is a possibility that any givenpixel is defective and will thus produce a value that does not correlate to the amount oflight it was subject to. As such, the processing ...

    • Delay-Fault BIST in Low-Power CMOS Devices 

      Leistad, Tor Erik (Master thesis, 2008)
      Devices such as microcontrollers are often required to operate across a wide range of voltage and temperature. Delay variation in different temperature and voltage corners can be large, and for deep submicron geometries ...

    • Employment of Iddq test 

      Sund, Tor Jørund (Master thesis, 2006)
      Oppgaven innebærer å implementere Iddq som en testmetode for Atmel Norge. Testen skal implementeres på brikker som allerede har scan implentert. Oppgaven innebærer også å utføre pålitetlighetstesting av brikker som har en ...

    • Formal SoC Bus Verification with Sound Abstractions 

      Urdahl, Joakim Henrik (Master thesis, 2009)
      The fast development of semi-conductor technologies is matched for system design by an incrementing re-use of intellectual property (IP); this leaves verification as the biggest task. The verification problem has been known ...

    • Implementasjon av en MP3-dekoder 

      Engebretsen, Håvard Sperle (Master thesis, 2006)
      MP3 er et av de mest populære formatene som brukes til å lagre lydklipp i dag. Det er derfor av interesse å studere muligheten for å integrere en MP3-dekoder i et innvevd system. Tidligere har prosjekter som omhandler ...

    • Lavkost diskret ordgjenkjenner på enkel mikrokontroller 

      Kringstad, Hallvard (Master thesis, 2006)
      Diskrete ordgjenkjenner på en Atmel Mega32. Benytter Dynamic Time Warping og Mel-Frequency Cepstral Coeffisients.

    • Low-power microcontroller core 

      Eriksen, Stein Ove (Master thesis, 2009)
      Energy efficiency in embedded processors is of major importance in order to achieve longer operating time for battery operated devices. In this thesis the energy efficiency of a microcontroller based on the open source ZPU ...

    • Modern verification methods for AVR 

      Kelley, Erik Nathaniel (Master thesis, 2010)
      A litteratur study of the Verification methodology manual and a study of which possibilities this methodology gives and how applicable it is for use in Atmel's future module and chip projects. Afterwards VMM shall be apllied ...

    • Multiple Power Domains 

      Lysfjord, Ivar Håkon (Master thesis, 2008)
      When new transistor technology is used in a microcontroller design, the transistors become smaller. They cannot withstand the same voltages as older technology, because of their size. The automotive industry still uses 5V ...

    • Optimization of Audio Bitstream Digital-to-Analog Converter 

      Walberg, Irun (Master thesis, 2009)
      In this master thesis, I have studied an already existing Audio Bitstream Digital to Analog Converter (ABDAC) for AVR32, and I have looked upon the possibilities to improve it. The thesis was mainly divided into two tasks; ...

    • Processing Core for Compressing Wireless Data - The Enhancement of a RISC Microprocessor 

      Olufsen, Eskil Viksand (Master thesis, 2006)
      This thesis explores the ability of the proprietary Texas Instruments embedded 16 bits RISC microprocessor, NanoRisc, to process common lossless compression algorithms, and propose extensions in order to increase its ...

    • Processing Core for Compressing Wireless Data: The Enhancement of a RISC Microprocessor 

      Olufsen, Eskil Viksand (Master thesis, 2006)
      This thesis explores the ability of the proprietary Texas Instruments embedded 16 bits RISC microprocessor, NanoRisc, to process common lossless compression algorithms, and propose extensions in order to increase its ...

    • Study of test quality improvement with Iddq testing 

      Lyng, Erik (Master thesis, 2008)
      This project was a continuation of the autumn project named ?Iddq Analysis? [1]. The assignment by Atmel Norway was given to examine the reliability and fault types in ?Iddq only? circuits. This project started with a ...

    • Verification of an AES RTL Model with an Advanced Object-Oriented Testbench in SystemVerilog 

      Ruud, Henrik (Master thesis, 2007)
      This Master's thesis reports the verification planning and verification process of a Verilog RTL model. Modern verification techniques like constrained randomization, assertions, functional coverage analysis and object ...