Automatic synchronous-to-asynchronous circuit conversion
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One of the major challenges with today s ASIC designs is not necessarily the performance in terms of speed, but rather their power consumption. This is becoming increasingly important as the demands for mobile devices are growing rapidly. Almost all of the microchips fabricated today are base on a global clock synchronizing the on-chip activity; hence they are called clocked or synchronous circuits. The use of a global clock eases the design process as the designer can assume discreet time, thus only needing to focus on the functionality of the circuit. However, synchronous circuits tend to dissipate unnecessary power when idle, and the increasing complexity of today s microchips makes the clock tree harder to distribute evenly. Asynchronous circuits don t have a global clock tree spanning the entire circuit. Instead all activity is synchronized by using handshake protocols between different stages in the circuit. This gives asynchronous circuits some theoretical benefits that make them attractive. These benefits include: (1) lower power consumption, (2) no clock distribution or clock skew problems, (3) robustness towards variations in supply voltage, temperature and fabrication parameters. On the other hand, there are some drawback related with these circuits like area overhead associated with handshaking circuitry and the lack of EDA tools easing the design process. However, papers have recently started to appear in academia that show different ways of designing asynchronous circuits by using a design flow originally intended for synchronous circuits. This allows the designer to reuse synchronous designs and automatically convert them into their asynchronous counterpart, thus making the design process a whole lot easier.The main objective of this thesis has been to develop software which automatically converts a synchronous circuit into its asynchronous counterpart based on conversion techniques currently available in academia. The conversion tool has been designed in a way that allows it to be seamlessly integrated into a synchronous design flow, thus allowing for reuse of currently existing technology libraries. Several circuits have been converted and evaluated, including an 8-bit CPU-core provided by Atmel.