Optimization of Audio Bitstream Digital-to-Analog Converter
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In this master thesis, I have studied an already existing Audio Bitstream Digital to Analog Converter (ABDAC) for AVR32, and I have looked upon the possibilities to improve it. The thesis was mainly divided into two tasks; look into the Hardware Description Language (HDL) code and suggest improvements, as well as look into the external filter solution and suggest improvements. As my field of study is digital circuit design the main focus has been on improving the HDL code. The interpolation filter of the ABDAC module contained 8 adders, and these adders have been replaced by 2 adders and 2 state machines. This modification alone reduced the area with 22.23%. The modifications done to the HDL code did not improve the performance of the module. To improve the performance of the ABDAC module, the analog external low-pass filter was upgraded from a 1st order passive filter to a 4th order active filter. Looking at the co-simulation results, this upgrade improved the performance by 4-6%. Despite the improvements achieved throughout this thesis there is still potential to improve the ABDAC further, and suggestions for further work are found in the last chapter of this report.