High-level implementation of a partial DSP algorithm chain used in a digital radio using functional programming
Master thesis
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http://hdl.handle.net/11250/2615917Utgivelsesdato
2016Metadata
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This thesis investigates the advantages of using functional programming as ahardware description tool. The functional programming paradigm shares a lotof similarities with hardware, as it is highly parallel in nature and has a notionof structure in its descriptions. Furthermore, it operates on a higher-level ofabstraction compared to commonly-used hardware description languages, whichfacilitates the design- and debugging process.
The thesis explores the Viterbi decoder in detail, and looks at related hardwareimplementation techniques. The decoder is implemented in the functionalprogramming language Haskell, and transformed to a synthesizable SystemVer-ilog description with a tool known as CLaSH. The generated solution is verifed with testbenches made for a reference design, provided by Nordic Semiconductor. Furthermore, the CLaSH generated implementation is synthesized and the quality is compared with the reference design, in terms of resource utilization and performance.