Ultra-low power Design of DSRC modulator/demodulator in 28nm FD-SOI
Master thesis
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http://hdl.handle.net/11250/2456609Utgivelsesdato
2017Metadata
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Sammendrag
This project thesis presents the design and implementation of the DSRC modulator/demodulator and stack, both implemented in 65nm cmos and 28nm fdsoi. Both parts are simulated in spectre with different supply voltages and under different temperatures.