• 5.8 GHz VCO 

      Dang, Nhan Thanh (Master thesis, 2006)
      The explosive growth in wireless communications has led to an increased demand for wireless products that are low-cost, low-power and compact. One approach to meet these demands is the system-on-a-chip (SoC) integration, ...
    • 5.8GHz, 1W high efficiency Power Amplifier in 90nm CMOS 

      Tofte Røislien, Nina (Master thesis, 2009)
      PREFACE This master s thesis was written as the final step towards my master s degree, and it thereby marks the ending of my time at NTNU. The master s thesis was developed due to a proposal made by Texas Instruments, ...
    • Design of a 5.8 GHz Multi-Modulus Prescaler 

      Myklebust, Vidar (Master thesis, 2006)
      A 64-modulus prescaler operating at 5.8 GHz has been designed in a 0.18 μm CMOS process. The prescaler uses a four-phase high-speed ÷4 circuit at the input, composed of two identical cascaded ÷2 circuits implemented in ...
    • Design of a 5.8 GHz Multi-Modulus Prescaler 

      Myklebust, Vidar (Master thesis, 2006)
      A 64-modulus prescaler operating at 5.8 GHz has been designed in a 0.18 μm CMOS process. The prescaler uses a four-phase high-speed ÷4 circuit at the input, composed of two identical cascaded ÷2 circuits implemented in ...
    • Design of a high IIP2 2.4GHz RF Front-end 

      Eliassen, Thomas (Master thesis, 2006)
      This master thesis presents the design of a high IIP2 direct-conversion receiver front-end, consisting of a LNA and I- and Q-channel mixers. The front-end is implemented in a 0.18 μm technology with 1.8V supply voltage. ...