Hyper-Spectral Imager for Oceanographic Applications (HYPSO) is being developed as a part of SmallSat laboratory at NTNU. The satellite capable of capturing and processing of hyperspectral images will be equipped with Zynq-7000 on-board processing system consisting of ARM-based processor with the hardware programmability of an FPGA. FPGA offers inherent reconfigurability, smaller size and weight, substantially lower power consumption and reduced costs, compared to its counterpart in other technologies. In this thesis, a part of on-board hyperspectral processing in FPGA is explored.
Hyperspectral images obtained by imaging spectrometer contain a vast amount of data which require techniques such as target detection to extract useful information. This thesis presents implementations of target detection algorithms for hyperspectral images. The algorithms are implemented as hardware-software partitioned system on Xilinx Zynq-7000 development platform. Prior to FPGA implementation, the algorithms such as ACE, SAM, CEM and ASMF were reviewed and tested on 5 different hyperspectral datasets. The detection performance of the algorithms was evaluated using MCC score, visibility score and ROC curves.
Two FPGA solutions for target detection are presented: HW/SW partitioned design and full FPGA solution. The designs were modelled using VHDL in attempt to gain the most optimal solution for our application. The operations of algorithms are partitioned on the heterogeneous platform between processing system and programmable logic with special consideration of background estimation. In HW/SW partitioned design, background estimation is performed prior to detection statistic calculation, while in full-FPGA implementation background is estimated in real-time as image frames are captured using the imager. Both solutions provide certain advantages depending on the desired application. Algorithm modelling and testing was performed in MATLAB environment, while FPGA modules were synthesized using Xilinx Vivado Design Suite.
In addition to target detection algorithm implementations, PPI endmember extraction algorithm was implemented using Vivado HLS. This implementation illustrates productivity benefits of a C-based development flow using HLS.