| dc.description.abstract | When working on a limited energy budget, wireless and battery powered devices that monitor sensors need to do some degree of local computation to save power on transmission.
Therefore there is a need for floating-point capabilities in a lower power segment than what has traditionally been the case.
In modern technologies leakage power plays an increasingly important role, and as such reducing the area can also have a positive impact on the total energy consumption, with the added benefit of lower manufacturing cost.
This Thesis proposes modifications to the floating-point unit from the PULP platform that yield area reductions of approximately 13% by reusing the fused multiply-add unit for regular add/sub and multiply operations.
Due to poor optimization the initial results are worse than expected, with more than twice the energy/op for multiplication and addition compared to the standard FMA-enabled PULP FPU, but with the appropriate power optimizations this could still prove to be a reasonable compromise for area-constrained implementations that still need high throughput and low power.
For operations other than add, subtract and multiply, the modified FPU yields up to 7% lower energy/op. | |
