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dc.contributor.advisorLarsen, Bjørn B.
dc.contributor.authorSørlie, Ole Kristian Hamre
dc.date.accessioned2017-11-17T15:02:15Z
dc.date.available2017-11-17T15:02:15Z
dc.date.created2017-07-03
dc.date.issued2017
dc.identifierntnudaim:16597
dc.identifier.urihttp://hdl.handle.net/11250/2467026
dc.description.abstractThe NTNU Test Satellite (NUTS) is a double CubeSat satellite developed by students at the Norwegian University of Science and Technology (NTNU) with the intention of eventually launching it into low earth orbit. The goal of the project is primarily to establish two way communication between the satellite and a ground station on earth and to transmit telemetry data from onboard sensors and images from the onboard camera module. This thesis aims to implement the JPEG2000 image compression format on an FPGA on the camera module of the satellite using the VHDL programming language. The purpose of image compression is to reduce the amount of data needed to store the images, which in turn reduces the amount of data which has to be transmitted down to earth through the limited downlink. The wavelet transform based JPEG2000 format was selected because of its superior quality at low bit rates and its robustness to bit errors compared to the cosine transform based JPEG format. The JPEG2000 compression system was partially implemented in VHDL, with the final encoding stages of the system remaining incomplete due to time constraints. The current system consists of six independent modules: a demosaicing module, a gamma correction module, an intercomponent transform module, a wavelet transform module, a quantization module and finally the incomplete encoding module. The demosaicing module transforms raw Bayer encoded images into RGB images, while the gamma correction module performs gamma correction to account for distortion effects added by the image sensor on the camera module. The intercomponent transform module performs an irreversible color transform on the image, while the wavelet transform module performs a multi-level discrete wavelet transform on the image before it is scalar quantized in the quantization module. Afterwards the result would have been encoded in the encoding module, which is only partially implemented. Each module was tested against MATLAB implementations in addition to tests performed in Xilinx Vivado. The tests indicated that the modules performed as expected and that they were synthesizable with an acceptable hardware resource usage. Timing Analysis tests also show that the maximum operating speed of the compression system is 63 MHz, which makes it able to process a 2592x1944 resolution image in around 866 ms when not accounting for the encoding process of the system.
dc.languageeng
dc.publisherNTNU
dc.subjectElektronikk (2årig), Design av digitale systemer
dc.titleJPEG2000 Image Compression In Hardware
dc.typeMaster thesis


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