Evaluation of cache architectures for a low-power microcontroller system

Abstract

Reducing energy consumption has become a mantra in the Embedded Systems industry. The energy consumption of a memory system of a microcontroller-based embedded system accounts for a great part of the total energy consumption. Furthermore, Flash memories, as the ones usually employed in this kind of system are very power hungry elements. With that premises in mind, this project tries to tackle this problem by analysing the impact of adding a cache system to such existent microcontroller system. It performs this task by going in two directions at the same time: on one of them it evaluates a set of new cache architectures using a high level simulation environment, while on the other it implements a cache system in the register-transfer level with the goal of performing accurate power measurements. This text is the report of how these tasks were accomplished, which results were obtained and what criticisms and conclusions can be derived from it.