| dc.description.abstract | In a noise-shaping SAR ADC, oversampling and noise shaping are used to increase the
conversion accuracy beyond that the SAR exhibits alone. To implement the noise
shaping, the residue voltage present at the SAR DAC plates after each conversion
is exploited, and fed into a loop filter connected to an extra input of the SAR
comparator.
In this thesis, an energy efficient noise-shaping SAR ADC for medical ultrasound
applications is designed in 28 nm FDSOI. The design specification is minimum 11.0
bit ENOB of accuracy, signal bandwidth of minimum 2 MHz, and sample rate of
minimum 32MHz. According to post-layout Monte Carlo simulations, the designed
ADC has an accuracy of 11.1 bit ENOB, and thus satisfies the accuracy requirement.
The signal bandwidth and sample rate are the same as in the design specification.
Specifically, the topics of this thesis are the design of the loop filter and its inter-
facing towards the SAR, as well as the overall high level design. The 9-bit SAR used
in the system is an already existing implementation.
A cascaded FIR-IIR filter topology is used for the loop filter. In this work, the
circuit implementation of this topology is improved, most importantly through
the introduction of chopped buffers at the filter input. This eliminates signal
attenuation due to charge sharing, and a DAC capacitance that is smaller than the
sampling capacitance in the loop filter can therefore be used. Also, auto-zeroed,
cascoded inverters rather than a standard OTA are used as gain elements in the
switched-capacitor filter structure, and this leads to better energy efficiency.
The designed ADC achieves a figure of merit (FOM) of 7.5fJ/conv-step in post-layout
Monte Carlo simulations, and to the best of the author s knowledge, this is better
than the current state-of-the-art of noise-shaping ADCs. When all kinds of ADCs
are taken into consideration, the achieved FOM seems to be similar to the current
state-of-the-art in the same specification range. | |
