Implementation of the Epileptic Seizure Prediction Algorithm on the SHMAC Platform

Abstract

This study concerns mapping of the Epileptic Seizure Prediction Algorithm to the SHMACplatform by analysing the algorithm and designing specialized hardware. The work is con-stituted through consideration of design approaches and variations within the differentapproaches and implementations of these designs. As the SHMAC platform uses the 32-bit floating point standard for number representations, the design approaches consists of either direct operations on floating point numbers or conversion from floating point to fixed point and operations with fixed point numbers within the module.Two of the approaches in this study use the floating point and fixed point packagesof VHDL and the float and sfixed types included in these packages, while the third usesstandard VHDL and the std logic vector type. The approaches were analysed throughsimulation in ISim and synthesis using Xilinx s XST, and verified through a golden device- similar method.The three approaches result respectively to each other as follows(these results assumeutilization RAM resources in synthesis):Float package: Low design time, low speed, high area consumption.Fixed package: Low design time, medium speed, medium area consumption.Standard VHDL: High design time, high speed, low area consumption.To conclude: standard VHDL appears to be the best choice due to the high speedand low area. It especially appears promising to keep to the standard VHDL as theXilinx platform does not seem fully compatible with the float and fixed point packages.Therefore it seems more likely to avoid unexpected problems and incompatibility withthe surrounding interface when the time comes for implementing the accelerator to theplatform.