Design of a low-cost CC-VFC for one-celled Li-Ion batteries

Abstract

The Lithium-ion battery is today used by close to every portable battery powered device, and this marked is constantly increasing because not only are the products the consumer have had for years getting more and more sophisticated, so he or she often “has” to replace yesterdays model with tomorrows. But as many products are furnished with new functions they use more power, hence their battery life is shortened. Because the Lithium-ion battery is so chemically advanced, it requires a sophisticated management system if it is to be fully utilized by the product. In this report, the parameters of the Lithium-ion battery which are the reason for this strict management are explained. The explanation does not look into the underlying chemistry for them because that is beyond the scope of this report. But sources for further reading on the subject are included. Different solutions for battery management are discussed and a Voltage-to-Frequency (VFC) converter is implemented in VHDL-AMS and simulated in ADVance-MS from Mentor[2]. The sources of error in the design are identified but dealt with in this report. This is not necessary before implementation in a CMOS-process has been shown possible. Simulations without component deviations are good, but once they are introduced, the converter shows that it is too sensitive for them. This can be solved utilizing digital error correction and calibration. After the ideal simulations are performed, transistor level simulations for the circuit are performed. Different solutions and requirements for the various components in the Voltage-to-Frequency converter are looked into with respect to the results found while simulating the ideal circuit. It was found that the comparator should have hysteresis to avoid unwanted chattering in its output signal. The architecture was chosen and the comparator was simulated. It was found that this architecture provided some offset-voltage, but this can easily be compensated by subtracting the offset from its reference voltage. Digital calibration can also here be utilized, but this is not looked into. Two high-gain op-amp architectures are looked into and simulated in this report, it was found that the two-stage used slightly more power than the two-stage op-amp with cascode-output, but they both provided approximately the same gain, even though the two-stage op-amp with cascode-output theoretically should provide about 100 times more gain. From this it is concluded that this architecture has a gain-limit independent of architecture used around 56dB. It is concluded that the Voltage-to-Frequency-architecture looked into is not suitable for implementation in this CMOS-process and that another architecture must be found if a Voltage-to-Frequency converter shall be made for the architecture.