Blar i Institutt for elektroniske systemer på emneord "Elektronikk (2årig), Design av digitale systemer"
Viser treff 1-20 av 22
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A study of hardware compression of images
(Master thesis, 2016)In this paper, we will take a closer look at the possibility of compressing images to the JPEG 2000 standard using an FPGA's hardware architecture. This FPGA will be put into a satellite, which is going to orbit the earth ... -
Adaptive Beamforming Using the Recursive Least Squares Algorithm on an FPGA
(Master thesis, 2015)This thesis describes the design and implementation of a five-channel beamformer using a Space-Time Adaptive Processing (STAP) filter with Recursive Least Squares (RLS) as the adaptive algorithm. The objective of the ... -
Adaptive Store and Forward - A look into possible solutions for the increasing resource consumption in wireless sensor networks
(Master thesis, 2016)Over the recent years the interest for wireless sensor networks and Internet of Things (IoT) has grown significantly. As a consequence of this, there is a need for solutions to conserve restricted resources such as energy ... -
Automatic Dynamic Clock Gate Analysis
(Master thesis, 2018)The clock gate is a logic cell seen in most modern electronic integrated circuits. The clock gate is used to stop a clock signal from propagating through the circuit, and hence minimize dynamic power consumption. Clock ... -
Design and analysis of a video scaler suited for FPGA implementation
(Master thesis, 2017)A video scaler, is a module that receives a picture, enlarge or shrink it, and sends it back.The video scaler in this thesis was made to be part of an AXI-Stream Video System thatis suited to be implemented on a FPGA.The ... -
Design and analysis of an H.265 entropy encoder
(Master thesis, 2017)The Context-Adaptive Binary Arithmetic Coding(CABAC) used in High Efficiency Video Coding(HEVC/H.265) is a near optimal entropy coding method. As a consequence of this coding efficiency, CABAC implementation is a complicated ... -
Design and Implementation of a Reliable Transport Layer Protocol for NUTS
(Master thesis, 2015)The NTNU Test Satellite (NUTS) is a double CubeSat developed mainly by students and volunteers at the Norwegian University of Science and Technology (NTNU). One of the main goals of the NUTS mission is to establish a ... -
Design of a residue amplifier for a SAR-assisted pipeline ADC
(Master thesis, 2017)This thesis explores the use of the ring amplifier in 28 nm FDSOI. The intended use is as a residue amplifier in a SAR (successive approximation register) assisted pipeline ADC. The specifications for the ADC are 13 effective ... -
EEG-based Brain Computer Interface for Controlling a Drone - using machine learning, optimized for a battery powered device
(Master thesis, 2018)Brain Computer Interfaces enable the use of brain waves to control computer-based external devices. It can, however, be difficult to trigger a specific brain wave, and it might not be repetitive enough to be used in such ... -
Energy Efficient Floating Point Unit for the SHMAC Platform
(Master thesis, 2017)Floating-point operations are critical for many applications where heterogenous computing is gaining traction. Floating-point implementation can be power hungry, however. As such, this thesis presents the architecture and ... -
High-level implementation of a partial DSP algorithm chain used in a digital radio using functional programming
(Master thesis, 2016)This thesis investigates the advantages of using functional programming as a hardware description tool. The functional programming paradigm shares a lot of similarities with hardware, as it is highly parallel in nature and ... -
Humidity sensor
(Master thesis, 2018)Disruptive Technologies(DT) has a sensor that is able to measure touch and proximity by monitoring change in capacitance. This work investigates the possibility of using the sensor for Relative humidity(RH) measurements. ... -
HW/SW Codesign of a Pedestrian Detection System
(Master thesis, 2018)The HW/SW co-design philosophy introduced almost two decades ago provides solutions to common challenges in the electronic system design industry. It provides techniques for improving the efficiency of conventional design ... -
Implementation and Comparison of Digital Arithmetics for Low Voltage / Low Energy Operation
(Master thesis, 2015)This thesis compares digital arithmetic circuit implementations in a 28nm FD-SOI technology of an earlier solution done in a 65nm bulk CMOS technology. The design is a 16-operand adder circuit with 9-bit operands working ... -
JPEG2000 Image Compression In Hardware
(Master thesis, 2017)The NTNU Test Satellite (NUTS) is a double CubeSat satellite developed by students at the Norwegian University of Science and Technology (NTNU) with the intention of eventually launching it into low earth orbit. The goal ... -
Lav effekt sensornettverk, for registrering av kjøretøy
(Master thesis, 2015)Denne prosjektoppgaven omhandler design og implementasjon av et lavenerginettverk bestående av parkeringssensorer. Dataen som skal sendes vil være om det er en bil parkert på parkeringsplassen, eller ikke. Systemet vil ha ... -
Low Power Electrophoretic Display Module
(Master thesis, 2016)The electrophoretic display (EPD) technology has great potential for use in small sized, low power portable devices and Internet of Things (IoT) applications. Due to its capability of true bistability and reflectivity, it ... -
NUTS Backplane Revision - Improving Reliability and Modularity of the NTNU Test Satellite
(Master thesis, 2016)The NTNU Test Satellite is double CubeSat being built at NTNU. The main payload of the satellite is a camera for earth observations. The satellite is based on a modular design with a "motherboard" style backplane where ... -
Simulation and Analysis of a Wireless Sensor Network
(Master thesis, 2015)More efficient wireless communication in these days are a topic of capital importance. Specially in wireless sensor networks (WSN) where the system is often battery-powered. In wireless Sensor Networks (WSN), where the ... -
Ultra low voltage combinatorial logic building blocks
(Master thesis, 2015)In this project the three logical gates inverter, 2-input NAND and 2-input NOR was created. Each gate was implemented with two different topologies. All gates created w ere able to operate with a supply voltage below the ...