Blar i Institutt for elektroniske systemer på emneord "Elektronikk, Krets- og systemkonstruksjon"

Viser treff 1-5 av 5

    • A 10 dBm 2.4 GHz CMOS PA 

      Kallerud, Torjus Selvén (Master thesis, 2006)
      This report describes the assessment and design of a 10 dBm 2.4 GHz CMOS PA including driver stage. The PA is designed in a 0.18 um CMOS technology. A three stage PA has been designed due to the high voltage gain needed. ...

    • Design of a 5.8 GHz Multi-Modulus Prescaler 

      Myklebust, Vidar (Master thesis, 2006)
      A 64-modulus prescaler operating at 5.8 GHz has been designed in a 0.18 μm CMOS process. The prescaler uses a four-phase high-speed ÷4 circuit at the input, composed of two identical cascaded ÷2 circuits implemented in ...

    • IV and CV characterization of 90nm CMOS transistors 

      Lund, Håvard (Master thesis, 2006)
      A 90nm CMOS technology has been characterized on the basis of IV and CV measurements. This was feasible by means of a state of the art probe station and measurement instrumentation, capable of measuring current and capacitance ...

    • Low Power Continuous-Time Delta-Sigma ADC - The robustness of finite amplifier GBW compensation 

      Nistad, Jon Helge (Master thesis, 2006)
      This paper reports on the modeling and simulation of a continuous-time delta-sigma analog to digital converter (ADC) in VHDL AMS. The ADC is intended for use in a microcontroller and is therefore underlying restrictions ...

    • Processing Core for Compressing Wireless Data - The Enhancement of a RISC Microprocessor 

      Olufsen, Eskil Viksand (Master thesis, 2006)
      This thesis explores the ability of the proprietary Texas Instruments embedded 16 bits RISC microprocessor, NanoRisc, to process common lossless compression algorithms, and propose extensions in order to increase its ...