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dc.contributor.advisorSnorre Aunet
dc.contributor.authorAnjan Sarker
dc.date.accessioned2023-07-11T17:22:46Z
dc.date.available2023-07-11T17:22:46Z
dc.date.issued2021
dc.identifierno.ntnu:inspera:77038608:46867809
dc.identifier.urihttps://hdl.handle.net/11250/3077895
dc.descriptionFull text not available
dc.description.abstract
dc.description.abstractPosit is a relatively new number format and proposed alternative of IEEE 754 floating-point number. It claims to be better than IEEE 754 in several ways such as lower hardware requirement, better dynamic range and etc.. This document analyzes an open-source floating-point unit with an open-source Posit arithmetic unit. It also showcases an implemented Posit unit from scratch and compares it with existing open-source implementations. One of the main criteria for this analysis and comparison is finding a suitable candidate for energy harvesting application as an accelerator. To limit wide comparison, only the single-precision floating-point units are analyzed. Overall analysis and comparison were made based on hardware design techniques, performance with standard operations, and added features. Cocotb, a cosimulation tool for VHDL and Verilog is used to have moderately constant and acceptable input stimuli. All the test run was run using QuestaSim to ensure operational correctness. Design Compiler from Synopsys is used for performance and power consumption. Overall, open-source Posit proved inferior in terms of area and power to open-source FPUs. A customized version of PACoGen (A Posit based arithmetic unit) have significance power saving, but still lagging behind open-sourced FPUs and a further discussion was made on the findings.
dc.languageeng
dc.publisherNTNU
dc.titlePosit - Analysis and implementation of Floating-point number alternative
dc.typeMaster thesis


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