dc.contributor.author | Sakalis, Christos | |
dc.contributor.author | Jimborean, Alexandra | |
dc.contributor.author | Kaxiras, Stefanos | |
dc.contributor.author | Själander, Magnus | |
dc.date.accessioned | 2020-03-02T08:54:46Z | |
dc.date.available | 2020-03-02T08:54:46Z | |
dc.date.created | 2019-11-29T08:50:05Z | |
dc.date.issued | 2019 | |
dc.identifier.issn | 1550-4832 | |
dc.identifier.uri | http://hdl.handle.net/11250/2644541 | |
dc.description.abstract | There exist extensive ongoing research efforts on emerging atomic-scale technologies that have the potential to become an alternative to today’s complementary metal--oxide--semiconductor technologies. A common feature among the investigated technologies is that of multi-level devices, particularly the possibility of implementing quaternary logic gates and memory cells. However, for such multi-level devices to be used reliably, an increase in energy dissipation and operation time is required. Building on the principle of approximate computing, we present a set of combinational logic circuits and memory based on multi-level logic gates in which we can trade reliability against energy efficiency. Keeping the energy and timing constraints constant, important data are encoded in a more robust binary format while error-tolerant data are encoded in a quaternary format. We analyze the behavior of the logic circuits when exposed to transient errors caused as a side effect of this encoding. We also evaluate the potential benefit of the logic circuits and memory by embedding them in a conventional computer system on which we execute jpeg, sobel, and blackscholes approximately. We demonstrate that blackscholes is not suitable for such a system and explain why. However, we also achieve dynamic energy reductions of 10% and 13% for jpeg and sobel, respectively, and improve execution time by 38% for sobel, while maintaining adequate output quality. | nb_NO |
dc.language.iso | eng | nb_NO |
dc.publisher | ACM Publications | nb_NO |
dc.title | Evaluating the Potential Applications of Quaternary Logic for Approximate Computing | nb_NO |
dc.type | Journal article | nb_NO |
dc.description.version | acceptedVersion | nb_NO |
dc.source.volume | 16 | nb_NO |
dc.source.journal | ACM Journal on Emerging Technologies in Computing Systems | nb_NO |
dc.source.issue | 1 | nb_NO |
dc.identifier.doi | 10.1145/3359620 | |
dc.identifier.cristin | 1754219 | |
dc.description.localcode | © ACM, 2019. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published here, http://dx.doi.org/10.1145/3359620 | nb_NO |
cristin.unitcode | 194,63,10,0 | |
cristin.unitname | Institutt for datateknologi og informatikk | |
cristin.ispublished | true | |
cristin.fulltext | postprint | |