| dc.description.abstract | In this thesis, a harmonic tuned amplifier has been designed and manufactured to investigate if Dynamic Gate Control can be utilized to obtain greater linearity properties. The design process has been conducted with the CAD software Agilent's Advanced Design System, where the PA has been based on a 10 W HEMT transistor from Cree and a FR-4 substrate printed circuit board. The PA has been designed to operate at a class AB bias and fundamental frequency of 2 GHz.
While operating at stationary optimized bias has the manufactured PA obtained a 1 dB bandwidth of 100 MHz, and single-tone peak output power and peak PAE of respectively 41.1 dBmW (12.88 W) and 66 %. Some deviations between the simulated and measured results has been observed, but all design specifications has been achieved.
To investigate the potential of the technique Dynamic Gate Control, three different flat gain cases has been created, where the gate-voltage has been altered relative to the available input source power envelope. Results has been apprehended by applying a two-tone signal with fixed 2 MHz spacing, to investigate if flat gain characteristic was achievable together with linear intermodulation distortion levels. The achieved efficiency properties has also been evaluated, because biggest trade-off for linearity is efficiency.
Initially, a Dynamic Gate Controlled simulator test-bench was implemented to explore the potential of this technique. Results obtained revealed that by utilizing DGC nearly all AM-AM conversions obtained from variating gain was eliminated almost throughout the power range.
A 1 dB gain reduction, relative to its initial flat characteristic, was moved 5 dBm higher in power compared to the same PA operating without DGC. In addition was a 0.6 dBm higher peak output power achieved. In terms of IMD, an enhancement of maintaining linear IMD levels, below -30 dBc, was obtained 5.7 dBm higher in power, compared to the simulated PA without DGC.
The manufactured PA also achieved much flatter gain characteristic together with 0.7 dBm higher peak output power. The point where the gain obtained a 1 dB gain reduction was moved 6.2 dBm higher in power, compared to the manufactured PA without DGC. Which is considered as a great enhancement in terms of AM-AM conversion.
The IMD properties apprehended with DGC on the manufactured PA did not conform to the simulations. The obtained measurement results did not enhance the linearity properties of the PA, as the IMD levels was much higher. This was most likely a result of the manufactured PA exhibiting degraded IMD properties, compared to the simulated. Therefore has it not been proven whether DGC can be utilized to improve the linearity of a PA in terms of IMD.
The evaluated efficiency properties of the manufactured and simulated PA utilizing DGC was in good conformity. Improvement of efficiency in the lower power range has been achieved. Dependent on how much gain the DGC utilized, even higher in power was the efficiency improved. Lower gain obtains larger power range. In addition has greater peak efficiency been achieved. Thus, an average efficiency enhancement is therefore possible, but dependent on how much gain the DGC utilizes and the PDF of the applied input signal. In other words, the biggest trade-off for efficiency is gain.
To be able to realize DGC in an actual application, a bias control device has to be implemented. With today's technology, implementation of this device is realizable with a digital signal processing unit, which preferably uses a DGC-algorithm of a lowest order as possible. Therefore, has each flat gain case in the laboratory been utilized by varying the gate-voltage with both second and third order algorithms. From the DGC-results obtained, it has been concluded that it should be sufficient to utilize DGC with an accurate modelled second order algorithm to obtain the property enhancements made possible by DGC. | en |
