Prototyping a Reconfigurable Architecture suitable for Multitasking

Abstract

Integrating reconfigurable computing hardware into general purpose computers offers promise of performance improvement. General purpose computers allows for a large amount of multitasking, as such, the reconfigurable hardware integrated intosuch a system should also support multitasking. This requires a low overhead reconfiguration method that supports preemption of tasks running on reconfigurablehardware. To investigate methods that can integrate reconfigurable hardware intoa multitasking machine an architecture for a reconfigurable device is proposed.In this work the proposed architecture is taken to prototype level. This includesa definition of the computational properties of the basic reconfigurable blocks, areconfiguration method that can fit within the requirements of multitasking, a configuration format that allows for backwards binary compatibility, and support forrudimentary control flow. The resulting prototype system has been tested andevaluated.