dc.contributor.advisor | Svarstad, Kjetil | nb_NO |
dc.contributor.advisor | Orlandic, Milica | |
dc.contributor.author | Trønnes, Kim | nb_NO |
dc.date.accessioned | 2014-12-19T13:50:06Z | |
dc.date.accessioned | 2015-12-22T11:50:54Z | |
dc.date.available | 2014-12-19T13:50:06Z | |
dc.date.available | 2015-12-22T11:50:54Z | |
dc.date.created | 2014-09-16 | nb_NO |
dc.date.issued | 2014 | nb_NO |
dc.identifier | 747520 | nb_NO |
dc.identifier | ntnudaim:11641 | |
dc.identifier.uri | http://hdl.handle.net/11250/2371100 | |
dc.description.abstract | In this thesis, a proposed hardware architecture of an H.264/AVC 8 × 8luminance intra prediction module is designed and realized in VHDL tobe used on an FPGA. The module is a part of a MPEG-2 to H.264/AVCtranscoder and its implementation is based on an existing design of a4 × 4 luminance intra prediction module used in the same transcoder.Intra prediction is characterized by high data dependency betweeninput video frames which makes it hard to achieve a high throughput. Thisis solved by processing 16 image samples in parallel and by implementinga partial pipeline to increase efficiency.The design is implemented and synthesized on the Kintex-7 XC7K325Tboard with a maximum clock frequency of 129.34 MHz, which gives athroughput of 456.32 Mpixels/s. This is enough to encode 2160p (4kUHD) video frames at 30 frames per second in real time. | nb_NO |
dc.language | eng | nb_NO |
dc.publisher | Institutt for elektronikk og telekommunikasjon | nb_NO |
dc.title | Design of an 8x8 Intra Prediction Module | nb_NO |
dc.type | Master thesis | nb_NO |
dc.source.pagenumber | 92 | nb_NO |
dc.contributor.department | Norges teknisk-naturvitenskapelige universitet, Fakultet for informasjonsteknologi, matematikk og elektroteknikk, Institutt for elektronikk og telekommunikasjon | nb_NO |