Optimization of electronic Gigabit Ethernet Interfaces in the OpMiGua hybrid Circuit/Packet Network Demonstrator
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This thesis was written at NTNU during the spring of 2006. The main goals of the thesis were to contribute in the further expansion of the OpMiGua demonstrator, with emphasis on the electronic aspects. OpMiGua is a collaboration project between Telenor R&D, Network Electronics and NTNU. The main objectives of the project are to be able to provide service guarantees in an optical network, while optimizing the utilization of network resources. This is achieved using a hybrid switching scheme combining circuit and packet switching. The demonstrator was impaired by errors in FPGAs used as Gigabit Ethernet interfaces. Control signals for controlling the traffic flow was deviant from the specified behavior and the FPGAs tended to lock up during use, resulting in interrupted experiments. Both issues were resolved and an altered version of the design was implemented. The design was verified through experiments. Continuation of a project on increasing the buffer size of the electronic design based on a provided proposal was initiated. Priority was however given to parts of the interface vital for demonstrating the feasibility of the OpMiGua concept. Due to the restricted timeframe available, completing the DRAM design therefore remains. Two experiments were performed on the demonstrator, verifying the feasibility of different aspects involved in the OpMiGua project. The first experimental demonstration of a hybrid optical network was performed. The segregation of two traffic classes on the same link using a polarization time domain multiplexing scheme was demonstrated, absolute priority of the guaranteed service class was verified and high utilization of the capacity was achieved. Distinct thresholds for the maximum load were found between 0.869 and 0.967, depending on the traffic characteristics.