Blar i Institutt for datateknologi og informatikk på forfatter "Amundsen, Jørn Aslak"
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Adaptive Cache Sizing in Search Engines
Vågenes, Tony Tanami (Master thesis, 2008)The main objective of this thesis is to design and implement a method to automatically and adaptively partition a fixed amount of memory between a fixed number of main memory caches.Each cache is responsible for a single ... -
Energy Efficient Computing on Multi-core Processors: Vectorization and Compression Techniques
Al Hasib, Abdullah (Doctoral theses at NTNU;2018:143, Doctoral thesis, 2018)Over the past few years, energy consumption has become the main limiting factor for computing in general. This has led CPU vendors to aggressively promote parallel computing using multiple cores without significantly ... -
Evaluating performance and scalability of unified model for NWP
Eilertsen, Lars Eirik (Master thesis, 2005) -
Hardware and software surveillance
Braathen, Andreas (Master thesis, 2005)The surveillance of computer equipment is an important task at the European Laboratory for Particle Physics (CERN). Given the nature and size of its installations, constant feedback about the health state of its hosts is ... -
Performance Analysis of Cache-Aware Multicore Parallelization with Application to Optimization Theory
Stensen, Kristoffer (Master thesis, 2012)In previous work, a cache-aware sparse matrix multiplication for linear programming interior point methods was proposed. The serial implementations achieved speedups ranging from 1.2 to 108.0 over the implementation in ... -
Weighted Pattern Matching with PWMs on FPGAs
Krutådal, Lars Karsten (Master thesis, 2006)This paper has presented a solution to an FPGA-based PWM matcher in the form of the so-called FPWM Prototype, using the hardware facilities on the Cray XD1 Supercomputer. The prototype implementation currently runs as a ...