Error Detection and Correction for Low-Cost Nano Satellites

Abstract

The objective of this paper is to suggest low-cost measures for dependability and robust Error Detection and Correction for use in applications such as nano satellites, where price is a primary concern. Different methods have been evaluated, with the main result mitigation Single Event Effects causing bit-flips in system memory utilizing BCH codes. The general implementation is resource intensive and the algorithm has been adapted to the embedded platform. The codes have been implemented on a low-cost microcontroller with a real time operating system and faults have been injected during run-time to emulate a radiation environment. The performance impact and dynamic behavior of the algorithms are studied with third party tools. The Error Correction and Detection should prevent the expected hundreds of errors per day from accumulating in memory and affect the system. The resulting design is expected to be able to mask even frequent resets and errors from the system's operation. Parts of this thesis have been accepted for publication and the papers are included in the appendices.