An Efficient Real-Time FPGA Implementation of the CCSDS-123 Compression Standard for Hyperspectral Images
Journal article, Peer reviewed
Accepted version
Permanent lenke
http://hdl.handle.net/11250/2579776Utgivelsesdato
2018Metadata
Vis full innførselSamlinger
Originalversjon
IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing. 2018, 11 (10), 3841-3852. 10.1109/JSTARS.2018.2869697Sammendrag
Hyperspectral imaging (HSI) can extract information from scenes on the earth surface acquired by airborne or spaceborne sensors. On-board processing of HSI is characterized by large datasets on one side and limited processing time and communication links on the other. The CCSDS-123 algorithm is a compression standard assembled for space-related application that allows compacted data transmission via a transmission link. In this paper, a low-complexity high-throughput field-programmable gate array (FPGA) implementation of CCSDS-123 compression algorithm with band interleaved by pixel ordering is presented. Hardware accelerators implemented in FPGAs are increasingly used for custom tasks due to their efficiency, low power, and reconfigurability. The proposed implementation of CCSDS-123 compression standard has been tested on ZedBoard development board containing a Zynq-7020 FPGA. The results are verified against an existing software implementation. The synthesized design can perform on-the-fly processing of hyperspectral images with maximum operating frequency of 147 MHz. The achieved throughput of 147 Msamples/s (2.35 Gb/s) is higher when compared with the throughput reported in recent state-of-the-art FPGA implementations.