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Parasitic capacitances and inductances hindering utilization of the fast switching potential of SiC power modules. Simulation model verified by experiment

Tiwari, Subhadra; Midtgård, Ole-Morten; Undeland, Tore Marvin; Lund, Richard
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PID4862787.pdf (561.2Kb)
URI
http://hdl.handle.net/11250/2485476
Date
2017
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  • Institutt for elkraftteknikk [1941]
  • Publikasjoner fra CRIStin - NTNU [26591]
Original version
10.23919/EPE17ECCEEurope.2017.8099032
Abstract
This paper investigates the switching performances of two state-of-the-art half-bridge SiC MOSFET modules using a standard double pulse test methodology. A deliberate choice of the modules with the same voltage and current ratings, the same packaging, but different stray inductances and capacitances is made in order to give an insight into the influence of parasitics in the switching transients and energy losses. A circuit simulation is performed with varying stray parameters in an LTSpice to illustrate the impact of parasitics in both voltage and current waveforms. Thereafter, a detailed comparison between the two modules is presented at similar dv/dt and di/dt conditions through laboratory measurements. The experimental results confirm the simulation results, giving a clear message that parasitic capacitances and inductances hinder the fast switching potential of SiC power modules. Furthermore, the performance of device with different voltage ratings can be anticipated using this parametric study. Thus, the analysis and understanding of parasitics, and their influence on switching performance is vital in the choice of an appropriate SiC MOSFET module for a particular application. The present paper contributes in this regard.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)

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