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dc.contributor.authorAsheim, Truls
dc.contributor.authorGrot, Boris
dc.contributor.authorKumar, Rakesh
dc.date.accessioned2023-03-02T14:04:20Z
dc.date.available2023-03-02T14:04:20Z
dc.date.created2023-01-18T10:25:02Z
dc.date.issued2022
dc.identifier.isbn978-1-6654-4278-7
dc.identifier.urihttps://hdl.handle.net/11250/3055448
dc.description.abstractContemporary server applications feature massive instruction footprints stemming from deeply layered software stacks. These footprints far exceed the capacity of the branch target buffer (BTB) and instruction cache (L1-I), resulting in the so-called front-end bottleneck. BTB misses may lead to wrong-path execution, triggering a pipeline flush when misspeculation is detected. Such pipeline flushes not only throw away tens of cycles of work but also expose the fill latency of the pipeline. Similarly, L1-I misses cause the core front-end to stall for tens of cycles while the miss is being served from lower-level caches.en_US
dc.language.isoengen_US
dc.publisherACMen_US
dc.relation.ispartofThe 31st International Conference on Parallel Architectures and Compilation Techniques (PACT)
dc.rightsNavngivelse 4.0 Internasjonal*
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/deed.no*
dc.titleA Specialized BTB Organization for Serversen_US
dc.title.alternativeA Specialized BTB Organization for Serversen_US
dc.typeChapteren_US
dc.description.versionacceptedVersionen_US
dc.identifier.doi10.1145/3559009.3569692
dc.identifier.cristin2109152
cristin.ispublishedtrue
cristin.fulltextpostprint


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