| dc.contributor.author | Elster, Anne C. | |
| dc.contributor.author | Haugdahl, Tor Andre | |
| dc.date.accessioned | 2023-02-17T09:29:39Z | |
| dc.date.available | 2023-02-17T09:29:39Z | |
| dc.date.created | 2022-09-16T08:58:59Z | |
| dc.date.issued | 2022 | |
| dc.identifier.citation | Computing in science & engineering (Print). 2022, 24 (2), 95-100. | en_US |
| dc.identifier.issn | 1521-9615 | |
| dc.identifier.uri | https://hdl.handle.net/11250/3051840 | |
| dc.description.abstract | At GTC 2022, Nvidia announced a new product family that aims to cover from small enterprise workloads through exascale high performance computing (HPC) and trillion-parameter AI models. This column highlights the most interesting features of their new Hopper graphical processing unit (GPU) and Grace central processing unit (CPU) computer chips and the Hopper product family. We also discuss some of the history behind Nvidia technologies and their most useful features for computational scientists, such as the Hopper DPX dynamic programming (DP) instruction set, increased number of SMs, and FP 8 tensor core availability. Also included are descriptions of the new Hopper Clustered SMs architecture and updated NVSwitch technologies that integrate their new ARM-based Grace CPU. | en_US |
| dc.language.iso | eng | en_US |
| dc.publisher | IEEE | en_US |
| dc.title | Nvidia Hopper GPU and Grace CPU Highlights | en_US |
| dc.title.alternative | Nvidia Hopper GPU and Grace CPU Highlights | en_US |
| dc.type | Peer reviewed | en_US |
| dc.type | Journal article | en_US |
| dc.description.version | acceptedVersion | en_US |
| dc.source.pagenumber | 95-100 | en_US |
| dc.source.volume | 24 | en_US |
| dc.source.journal | Computing in science & engineering (Print) | en_US |
| dc.source.issue | 2 | en_US |
| dc.identifier.doi | 10.1109/MCSE.2022.3163817 | |
| dc.identifier.cristin | 2052293 | |
| cristin.ispublished | true | |
| cristin.fulltext | postprint | |
| cristin.qualitycode | 1 | |
