Performance Evaluation and Limitations of Overvoltage Suppression Circuits for Low- and Medium-Voltage DC Solid-State Breakers

Abstract

This paper presents a design and performance evaluation of three different overvoltage suppression circuits employed in a solid-state circuit breaker for medium- to high-power and low- to medium-voltage DC grids. The evaluated criteria are the requirements for passive components, as well as the breaker performance in terms of peak switch overvoltage, peak short-circuit current, fault clearance time and rate of voltage rise during the fault clearing process. Additionally, the impact of the stray inductance in the solid-state breaker design on the anticipated overvoltage is also investigated. Design and operating limitations of each configuration from an application perspective are also discussed. From simulations of a 1.8 kV and 500 A breaker for high-power medium-voltage DC applications it is shown that the most effective overvoltage suppression is achieved by means of using a metal-oxide varistor and a snubber capacitor connected in parallel with the main switch at a cost of high fault current. A medium-power solid-state DC breaker prototype rated at 1.5 kV and 50 A was also designed and constructed. The experimental results reveal that using only a metal-oxide varistor can be sufficient when the breaker employs high-voltage discrete semiconductors with long current falling time and is used in medium-power medium-voltage grids.