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dc.contributor.authorGiannakis, Andreas
dc.contributor.authorPeftitsis, Dimosthenis
dc.date.accessioned2022-09-19T14:10:56Z
dc.date.available2022-09-19T14:10:56Z
dc.date.created2021-03-26T14:27:46Z
dc.date.issued2021
dc.identifier.citationIEEE Open Journal of Power Electronics (OJPE). 2021, 2 277-289.en_US
dc.identifier.issn2644-1314
dc.identifier.urihttps://hdl.handle.net/11250/3018982
dc.description.abstractThis paper presents a design and performance evaluation of three different overvoltage suppression circuits employed in a solid-state circuit breaker for medium- to high-power and low- to medium-voltage DC grids. The evaluated criteria are the requirements for passive components, as well as the breaker performance in terms of peak switch overvoltage, peak short-circuit current, fault clearance time and rate of voltage rise during the fault clearing process. Additionally, the impact of the stray inductance in the solid-state breaker design on the anticipated overvoltage is also investigated. Design and operating limitations of each configuration from an application perspective are also discussed. From simulations of a 1.8 kV and 500 A breaker for high-power medium-voltage DC applications it is shown that the most effective overvoltage suppression is achieved by means of using a metal-oxide varistor and a snubber capacitor connected in parallel with the main switch at a cost of high fault current. A medium-power solid-state DC breaker prototype rated at 1.5 kV and 50 A was also designed and constructed. The experimental results reveal that using only a metal-oxide varistor can be sufficient when the breaker employs high-voltage discrete semiconductors with long current falling time and is used in medium-power medium-voltage grids.en_US
dc.language.isoengen_US
dc.publisherIEEEen_US
dc.rightsNavngivelse 4.0 Internasjonal*
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/deed.no*
dc.titlePerformance Evaluation and Limitations of Overvoltage Suppression Circuits for Low- and Medium-Voltage DC Solid-State Breakersen_US
dc.title.alternativePerformance Evaluation and Limitations of Overvoltage Suppression Circuits for Low- and Medium-Voltage DC Solid-State Breakersen_US
dc.typePeer revieweden_US
dc.typeJournal articleen_US
dc.description.versionpublishedVersionen_US
dc.source.pagenumber277-289en_US
dc.source.volume2en_US
dc.source.journalIEEE Open Journal of Power Electronics (OJPE)en_US
dc.identifier.doi10.1109/OJPEL.2021.3068531
dc.identifier.cristin1901359
cristin.ispublishedtrue
cristin.fulltextoriginal
cristin.qualitycode1


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Navngivelse 4.0 Internasjonal
Except where otherwise noted, this item's license is described as Navngivelse 4.0 Internasjonal