Communication Network for Internal Monitoring and Control in Multilevel Power Electronics Converter

Abstract

The design process of complex power electronics converters, such as the multilevel converter, can be simplified with the concept of Power Electronic Building Blocks (PEBBs). PEBB is a fully integrated hardware with power switches, gate driver, low level protection and measurement sensors assembled in one single block. Therefore, a range of multilevel converters can be easily constructed. However, in high power application, such as HVDC, an array of PEBBs is required. With increasing numbers of PEBBs, the conventional control interface between the controller and PEBBs will become increasingly complex. A large number of wires will be used to deliver the control, measurement and status signals. Therefore, a ring control network was introduced to simplify the wiring system. The exchanged information will be packed into data frame format and transmitted within the ring. However, data transmission delays must be accurately compensated for to ensure all PEBBs are able to initialize new duty cycles simultaneously. Besides, communication cable redundancy must be enabled to increase the ring reliability. This thesis first studied and investigated the prospect of implementing an established industrial network for internal monitoring and control of a power converter. A set of basic communication requirements was developed to evaluate some of the potential industrial networks. As a result, EtherCAT is recognized as the most potentially useful control network in this research. It meets the proposed maxima acceptable delay (approximately ± 20 ns) and supports single fault tolerance with its cable redundancy. Furthermore, a PEBB prototype was designed with EtherCAT FB1130 Piggy Back Controller board is included as a Slave Communication Controller. This thesis also proposed a simple redundancy controller for a cascaded multilevel converter. When PEBB failure is detected, this controller will either swap the backup PEBB with the defective unit or it will degrade the system level automatically. Finally, a Modular Multilevel Converter (MMC) with 2 kHz switching frequency is setup for experimental verification. Xilinx Zynq ZC702 Evaluation board is employed as a master controller. Level Shifted Pulse Width Modulation and capacitor voltage balancing control schemes are implemented within the Programmable Logic of XC7020. The feasibility of the MMC control strategies and the redundancy controller has been fully validated. Three ring behavioral tests are conducted to study the MMC performance by emulating EtherCAT network for internal monitoring and control of the converter. The results prove that MMC will operate normally if all PEBBs manage to initialize new duty cycles simultaneously with low latency (approximately ± 20 ns).