| dc.description.abstract | In this thesis, a half-bridge module rated at 1.2 kV, 300, 175 °C A employing SiC MOSFETs and SiC Schottky diodes has been developed and evaluated using computer tools. The developed module emulated a commercial available SiC MOSFET half-bridge module from Cree. As a part of the design methodology, a literature review of packaging approach and trends specific to unfolding the properties of SiC MOSFETs was conducted and is provided for the reader. The 3D CAD model of the module was realized in SolidWorks, and the parasitic inductances were extracted in ANSYS Q3D. The main contributors to the internal stray inductances were disclosed to be the power terminals and DBC terminals. A test circuit rated at 800 V and 150 A were developed in LTSpice to assess the performance of the developed module. The test-circuit incorporated the extracted parasitic inductances and the device models (supplied by Cree). The turn-on and turn-off times were in the range of 25 to 50 ns, respectively. The study revealed that the power loop inductance gave a notch of 193.4 V (606.4 V) at turn-on and an overshoot of 137.2 V (937.2 V) at turn-off. In addition, ringing in device waveforms were discussed and verified as being an effect of the power loop inductance resonating with the junction and output capacitances of the devices. The developed module had a power loop inductance of 16.6 nH, yielding a mismatch of only 1.6 nH from the real Cree module. The study validates the use of computer tools for investigating power module designs, as well as it being a valuable tool for studying the performance of SiC MOSFET modules. | |
