| dc.description.abstract | The work in this report has consisted in the design of three different inductors to verify how conductor profile impact stray capacitance, and how stray capacitance impact filtering performance.
The three conductor profiles were flat helical, vertical helical and circular.
By use of 3D-design and numerical computations in COMSOL Multiphysics, three inductors with the different conductor profiles has been created. Simplified 2D and 3D-models based on these were used to extract flux density and stray capacitance in numerous parametric sweeps.
The inductor parameters were later employed in a SIMULINK model to evaluate how the inductors, with their stray capacitance, performed in a dV/dt-filter.
Of the three conductor profiles, the flat helical profile exhibited the highest stray capacitance. The lowest stray capacitance was found in the circular conductor profile.
It was found that when the stray capacitance exceeds approximately 200 pF, reflections and voltage doubling occur at the filter output.
At minimum distance between turns, the flat helical profile had a stray capacitance of 543 pF. The vertical helical profile, had 217 pF and the circular profile, 71 pF.
Measures to decrease stray capacitance is discussed and simulated, and modified inductors are re-tested in SIMULINK to verify that reflections are mitigated. | |
