• BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing 

      Umuroglu, Yaman; Rasnayake, Lahiru; Själander, Magnus (Chapter, 2018)
      Matrix-matrix multiplication is a key computational kernel for numerous applications in science and engineering, with ample parallelism and data locality that lends itself well to high-performance implementations. Many ...
    • Challenges and solutions in creating a RISC-V computing platform 

      Monsen, Kristoffer Venæs (Master thesis, 2019)
      I denne masteroppgaven beskriver vi implementasjonen av et datasystem som baserer seg på RISC-V instruksjonssettet. Ved å gjenbruke eksisterende maskinvaremoduler fra Cobham Gaislers åpent tilgjengelige GRLIB IP core library ...
    • Clairvoyance: Look-Ahead Compile-Time Scheduling 

      Tran, Kim-Anh; Carlson, Trevor E.; Koukos, Konstantinos; Själander, Magnus; Spiliopoulos, Vasileios; Kaxiras, Stefanos; Jimborean, Alexandra (Conference object, 2017)
      To enhance the performance of memory-bound applications, hardware designs have been developed to hide memory latency, such as the out-of-order (OoO) execution engine, at the price of increased energy consumption. Contemporary ...
    • Clearing the Shadows: Recovering Lost Performance for Invisible Speculative Execution through HW/SW Co-Design 

      Tran, Kim-anh; Sakalis, Christos; Själander, Magnus; Ros, Alberto; Kaxiras, Stefanos; Jimborean, Alexandra (Chapter, 2020)
      Out-of-order processors heavily rely on speculation to achieve high performance, allowing instructions to bypass other slower instructions in order to fully utilize the processor's resources. Speculatively executed ...
    • Combining the SHA and ELD3 techniques to achieve energy-efficient data cache accesses 

      Asjad, Salahuddin (Master thesis, 2017)
      In recent years, CPU performance has become energy constrained. If performance is to continue increasing, new methods for creating more energy efficient CPUs will have to be explored. Current computing systems use complex ...
    • Creation of a software programmable hardware interface 

      Jordet, Ludvig Samuelsen (Master thesis, 2019)
      Gjennom arbeidet med denne oppgaven ble det laget to forskjellige maskinvaredesign. Den første var en konfigurerbar komponent som implementerte b˚ade UART, SPI og I2C. Denne ble laget for ˚a finne ut hvorvidt dette kunne ha ...
    • Efficient invisible speculative execution through selective delay and value prediction 

      Sakalis, Christos; Kaxiras, Stefanos; Ros, Alberto; Jimborean, Alexandra; Själander, Magnus (Journal article; Peer reviewed, 2019)
      Speculative execution, the base on which modern high-performance general-purpose CPUs are built on, has recently been shown to enable a slew of security attacks. All these attacks are centered around a common set of ...
    • Estimating Tail-Latency of Latency-Sensitive Workloads 

      Eggan, Alf Martin; Eggan, Karl Andreas (Master thesis, 2019)
      Mange av arbeidsoppgavene som behandles i dagens datasentre er følsomme for forsinkelse, og krever at brukere har en tilfredsstillende opplevelse, noe som gjør energibesparing til en utfordring, som følge av strenge krav ...
    • Evaluating performance impact of performing computations on storage nodes - Batch on Eos Extra Resources (BEER) 

      Tollefsen, Håvard (Master thesis, 2018)
      The Batch on EOS Extra Resources (BEER) project is a response to observations of available computing resources on EOS storage system. BEER introduces sharing computing resources between storage and compute nodes. The project ...
    • Evaluating the Potential Applications of Quaternary Logic for Approximate Computing 

      Sakalis, Christos; Jimborean, Alexandra; Kaxiras, Stefanos; Själander, Magnus (Journal article, 2019)
      There exist extensive ongoing research efforts on emerging atomic-scale technologies that have the potential to become an alternative to today’s complementary metal--oxide--semiconductor technologies. A common feature among ...
    • Ghost loads: what is the cost of invisible speculation? 

      Sakalis, Christos; Alipour, Mehdi; Ros, Alberto; Jimborean, Alexandra; Kaxiras, Stefanos; Själander, Magnus (Chapter, 2019)
      Speculative execution is necessary for achieving high performance on modern general-purpose CPUs but, starting with Spectre and Meltdown, it has also been proven to cause severe security flaws. In case of a misspeculation, ...
    • Implementing Data Cache Access Memoization (DCAM) in hardware to measure L1 DC and DTLB energy efficiency 

      Vedvik, Edgar (Master thesis, 2019)
      Nivå-1 data-hurtiglager (L1 DC) og mellomlager for dataoversetting (DTLB) er essensielle i nåtidens minnehierarki for å gi raskere tilgang til data og redusere antall ventesykluser. Disse strukturene bli aksessert ofte, ...
    • Improving Memory Access Locality for Vectorized Bit-Serial Matrix Multiplication in Reconfigurable Computing 

      Sasnayake Mudiyanselage, Lahiru Kasun Rasnayake; Själander, Magnus (Chapter, 2019)
      Low-precision matrix multiplication has gained significant interest in the research community due to its applicability in the quantized neural network domain. As a result, a multitude of variable precision hardware designs ...
    • Improving System Usability of Climbing Mont Blanc - An Online Judge for Energy Efficient Programming 

      Magnussen, Sindre (Master thesis, 2016)
      For each release of a new smartphone model, the limits of their CPUs, so called heterogeneous multicore processors, are pushed. As a result, the usage of such processors has gained an increased interest outside the mobile ...
    • Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing 

      Umuroglu, Yaman; Davide, Conficconi; Rasnayake, Lahiru; Preusser, Thomas B.; Själander, Magnus (Peer reviewed; Journal article, 2019)
      Matrix-matrix multiplication is a key computational kernel for numerous applications in science and engineering, with ample parallelism and data locality that lends itself well to high-performance implementations. Many ...
    • Static Instruction Scheduling for High Performance on Limited Hardware 

      Tran, Kim-anh; Carlson, Trevor E.; Koukos, Konstantinos; Själander, Magnus; Spiliopoulos, Vasileios; Kaxiras, Stefanos; Jimborean, Alexandra (Journal article; Peer reviewed, 2017)
      Complex out-of-order (OoO) processors have been designed to overcome the restrictions of outstanding long-latency misses at the cost of increased energy consumption. Simple, limited OoO processors are a compromise in terms ...
    • Strict Memory Protection for Microcontrollers 

      Sveen, Erlend (Master thesis, 2019)
      Moderne datasystemer beskytter prosesser fra hverandre med minnebeskyttelse. Mikrokontrollersystemer, som mangler støtte for minnevirtualisering, bruker typisk sett kun minnebeskyttelse for områder som programmereren finner ...
    • SWOOP: Software-Hardware Co-design for Non-speculative, Execute-Ahead, In-Order Cores 

      Tran, Kim-anh; Jimborean, Alexandra; Carlson, Trevor E.; Koukos, Konstantinos; Själander, Magnus; Kaxiras, Stefanos (Chapter, 2018)
      Increasing demands for energy efficiency constrain emerging hardware. These new hardware trends challenge the established assumptions in code generation and force us to rethink existing software optimization techniques. ...