Synchronous Optimal Modulation for Medium voltage Multi-phase Machines: Implementation of three-level modulators in Field Programmable Gate Arrays

Abstract

The advancement in power electronics devices like Insulated Gate Bipolar Transistors (IGBT) has increased the low voltage ac drive to the medium voltage drive system. These IGBTs have higher voltage capability. For eliminating the harmonic content three level converters are chosen rather than two level converters. But these inverter switches using IGBTs should be operated in low switching frequency so that the huge loss associated with switching loss is reduced to large extent. When switching frequency is low then conventional asynchronous modulation technique is not appropriate because of the formation of sub-harmonic components. Therefore, it is wise to apply synchronous modulation technique. Programmed Modulation is one of best synchronous modulation technique which pre-calculates the optimum switching angles. If those switching angles are calculated by minimizing total harmonic contents then it is called Synchronous Optimal Modulation. These optimized PWM strategies are extremely difficult to realize with conventional analog circuitry, but they can be effectively implemented in field-programmable gate array (FPGA) which has extremely fast computation capability and allows a few microseconds real-time computation of complex control algorithms. FPGA is a microchip which consists of matrix of configurable logic blocks (CLB) made up of flip flops and lookup tables. VHDL is Hardware Descriptive Language which is utilized to synthesize hardware designs in FPGA. VHDL creates digital circuitry, which performs operations in parallel so FPGA is extremely fast and performs various time critical tasks in the system. The FPGA which is used in this project is Vertex-5 ppc440 FX30T. The digital electronics for implementing Synchronous Optimal Modulation are written in Xilinx Embedded System. The extremely fast computation power of FPGA finds its application in multiphase machine. Although this thesis deals with three phase Induction motor, it can easily be extended up to nine phase Machine. This master thesis implements synchronous optimal modulation in FPGA for Neutral Point Clamped inverter feeding Induction machine. The result shows that synchronous optimal modulation can be applied for low switching frequency with lower total harmonics distortion.