| dc.description.abstract | Mixed-signal applications are among the fastest growing market segments in the electronics and semiconductor industry, and have caused many silicon manufacturers to have mixed-signal designs as one of their main focuses. Most SoC designs today are therefore mixed signal. With an escalation in circuitry complexity, there are increasing challenges when it comes to mixed-signal SoC verification.
This thesis explores the use of artificial neural networks for the classification of structural features, position, and signal length of RVM radio signals in a noisy environment. The training and testing data for the artificial neural networks where generated in MatLab R2018a, with the neural networks themselves being developed using MatLab's network toolbox. The networks were tested using the SGDM, RMSProp and ADAM solver algorithms, using both time-domain and frequency-domain input data.
The added white Gaussian noise was set based on a reference signal power of 25, which placed the noise peaks for the test-scenarios around 50-55. The amplitudes for the actual signals were set to 50 throughout all test scenarios. The structural classification achieved an accuracy of 0.9623, with a classification time of 3.4ms on a CPU. A smaller version of the CNN achieved an accuracy of 0.9529, with a classification time of 0.992ms per classification. The positional classification, in a similar environment, managed to pinpoint the position down to a 1 bit region with an accuracy of 0.982, with an accuracy of 0.7104 of classifying the exact sample number. This solution followed a hierarchical approach, using 4 CNNs and a total of 1.399ms per classification, not counting the time spent transferring data between the networks. The length classification achieved an accuracy of 0.9359, with a 0.9970 chance of being either accurate or 1 bit off. The classification time for this CNN was 0.449ms for each iteration. All of these results are taken using time-domain input data, which outperformed frequency-domain input-data throughout all test scenarios. | |
