• FIFOrder MicroArchitecture: Ready-Aware Instruction Scheduling for OoO Processors 

      Alipour, Mehdi; Kumar, Rakesh; Kaxiras, Stefanos; Black-Schaffer, David (Journal article; Peer reviewed, 2019)
      The number of instructions a processor's instruction queue can examine (depth) and the number it can issue together (width) determine its ability to take advantage of the ILP in an application. Unfortunately, increasing ...