| dc.description.abstract | Three 64-byte memory systems were designed for a 0.18µm standard CMOS technology, one 6T-SRAM system and two D-Flip-Flop systems. The leakage current, read energy and write energy of these systems were determined by simulation. A set of extrapolation formulas for area, leakage current, read energy and write energy were designed to determine the characteristics of the systems as the size of the memory increases.
The simulations showed that the 64-Byte 6T-SRAM system had a 39% lower area, an 83% lower leakage current, an 89% lower write energy and an 82% lower read energy than the reference D-Flip-Flop memory system. The extrapolation formulas predicted that as memory sizes increases, SRAM becomes more and more favorable in terms of area, leakage current, write energy and read energy. | |
