|dc.description.abstract||New generations of ultrasound imaging will contain thousands of receive and transmit elements in a single probe. This leads to challenges in analog front-end circuits concerning low power, low noise, low area consumption and high linearity.
This thesis presents the design and analysis of a fully differential charge sampling amplifier, CSA, in 28nm FD-SOI CMOS technology with a capacitive micromachined ultrasonic transducer, CMUT, model as source. The proposed CSA is intended as a front-end readout LNA for IVUS systems interfaced with an ADC for high accuracy digital conversion.
The readout of the CMUT is done by connecting the two CMUT terminals to the positive and negative input nodes of the proposed CSA, reading the current from both terminals and giving a differential input signal to the CSA. This way second harmonic destortion is improved.
A capacitive parasitic extraction is done and results from simulation of the layout with parasitic extraction are presented as final results.
The proposed CSA achieves a bandwidth of 7.9MHz around a center frequency of 5MHz with a gain at centerfrequency of 14.34dB with a CMUT as source and a sampling frequency of 64MHz. High linearity of HD2=-83dB, a relatively low power consumption of 110.6uW, an input impedance of 3.1kOhm and a noise figure, NF, of 5.79dB was achieved with an area consumption of 39.8um x 70.3um.||