Modeling and Characterization of SOI Multigate MOSFETs

Abstract

Multi-gate MOSFETs (MugFETs) with superior gate control are replacing planar CMOS in future technology nodes. Recently Intel announced that their 22nm technology will be based upon 3D Tri-gate MOSFETs. An accurate modeling framework for these devices is thus imperative. Also, proper characterization is required to reveal the advanced effects like self-heating in these devices. In this thesis, we present a 3D modeling framework applicable to different flavors of silicon-on-insulator (SOI) MugFETs using conformal mapping techniques. Our main focus has been the subthreshold regime, and hence the modeling of the short-channel effects (SCEs). Advanced nanoscale effects such as quantum confinement, ballistic transport have also been considered in this framework. The validity of modeling is verified with the numerical simulations from ATLAS device simulator, and also with the hardware data.

Characterization of SOI Trigate FinFETs has been done to study the self-heating in these devices, and the effects of self-heating on analog design and reliability in these devices. Our measurements indicate that the long-channel devices, typically used in the analog design, show significant negative intrinsic gain at low frequencies. These self-heating measurements are used to predict the temperature rise in these devices, and then to study the negative bias temperature instability (NBTI) in these devices in the presence of self-heating.