Show simple item record

dc.contributor.advisorSvarstad, Kjetilnb_NO
dc.contributor.authorNamork, Magnus Krokumnb_NO
dc.date.accessioned2014-12-19T13:46:38Z
dc.date.accessioned2015-12-22T11:45:15Z
dc.date.available2014-12-19T13:46:38Z
dc.date.available2015-12-22T11:45:15Z
dc.date.created2011-09-15nb_NO
dc.date.issued2011nb_NO
dc.identifier441352nb_NO
dc.identifierntnudaim:6264
dc.identifier.urihttp://hdl.handle.net/11250/2370246
dc.description.abstractTesting and verification of digital systems is an essential part of product develop-ment. The Network on Chip(NoC), as a new paradigm within interconnections;has a specific need for testing. This is to determine how performance and prop-erties of the NoC are compared to the requirements of different systems such asprocessors or media applications.A NoC has been developed within the AHEAD project to form a basis for areconfigurable platform used in the AHEAD system. This report gives an outlineof the project to develop testing and benchmarking systems for a NoC. The specificwork has been regarding the development of a generic module connected to theNoC and capability of testing the NoCs properties. The test system was initiatedby Ivar Ersland in 2009 and developed further by Andreas Hepsø, and MagnusNamork in the fall of 2010. The functionality and systems that are implementedare the following: Fully functional Hardware/Software interface which defines communicationbetween NoC the user Reactive system which responds to interaction based on package information MPEG example system that mimics an MPEG data stream Software reconfiguration of the traffic tables by sending specific packages tothe system Cell processor example application to test simple computation and commu-nicating modules on the networkThe systems have been tested successfully, verified and implemented on a XilinxSpartan FPGA. It has also been developed a software system written in C to read and interpret data from the Network in on-chip tests. In total these imple-mentations have been the foundation of building a benchmarking platform for theNoC.nb_NO
dc.languageengnb_NO
dc.publisherInstitutt for elektronikk og telekommunikasjonnb_NO
dc.subjectntnudaim:6264no_NO
dc.subjectMTEL elektronikk
dc.subjectKrets- og systemkonstruksjon
dc.titleNetwork on Chip for FPGA: Development of a test system for Network on Chipnb_NO
dc.typeMaster thesisnb_NO
dc.source.pagenumber155nb_NO
dc.contributor.departmentNorges teknisk-naturvitenskapelige universitet, Fakultet for informasjonsteknologi, matematikk og elektroteknikk, Institutt for elektronikk og telekommunikasjonnb_NO


Files in this item

Thumbnail
Thumbnail
Thumbnail

This item appears in the following Collection(s)

Show simple item record