Multi-type DRAM controller

Abstract

With the increased capacity of system on chip system, the need for efficient methods for system development is increasing in parallel. A common way to save work in a complete design is to use standard ip's for standard tasks. For most soc deigns processors, ram and bus communication will be self-evident modules. This modules can be bought or be made ones for later re-use. In this paper we will lock at the design of a versatile re-usable design of a dream controller with interface to a AMBA-AXI data bus.