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dc.contributor.advisorTyppø, Jukka Tapionb_NO
dc.contributor.advisorFikstvedt, Oddgeir
dc.contributor.authorDang, Nhan Thanhnb_NO
dc.date.accessioned2014-12-19T13:42:57Z
dc.date.accessioned2015-12-22T11:40:16Z
dc.date.available2014-12-19T13:42:57Z
dc.date.available2015-12-22T11:40:16Z
dc.date.created2010-09-02nb_NO
dc.date.issued2006nb_NO
dc.identifier346775nb_NO
dc.identifierntnudaim:1235
dc.identifier.urihttp://hdl.handle.net/11250/2368925
dc.description.abstractThe explosive growth in wireless communications has led to an increased demand for wireless products that are low-cost, low-power and compact. One approach to meet these demands is the system-on-a-chip (SoC) integration, where RF/analog and digital circuitry reside on the same chip, creating a mixed signal environment. While the SoC approach is attractive, it presents major challenges for circuit designers, particularly in the design of voltage controlled oscillators (VCO). The VCO is an important building block in RF systems, such as the transceiver. Integrated into a PLL, this VCO could serve as the local oscillator in wireless applications, such as unlicensed ISM applications. In these applications, the low cost provided by a fully integrated CMOS solution is very attractive. However, VCOs are sensitive when exposed to an electrically noisy environment. For that reason, a VCO with very low phase noise is desirable. This thesis focuses on the design of a fully integrated 5.8 GHz CMOS cross-coupled -Gm VCO that fulfils the given strict system requirements. The requirements state that the VCO can not exceed -115 dBc/Hz at 1 MHz offset from the carrier. Simultaneously, the VCO frequency tuning range must be minimum 20 %, and the circuit can not consume more than 3 mA from a 1.8 V supply. The VCO circuit in this thesis is implemented in a 0.18 um single poly, 6-metal CMOS process available through UMC. A symmetrical octagonal-shaped and differentially driven inductor is designed using the EM-simulator ADS Momentum. At 5.763 GHz, the simulated Q-factor of the inductor is 21.540 and it has an inductance L = 0.884 nH. The design of an inversion-mode tuning varactor is also presented. The VCO design is simulated in ADS 2005A, and the simulation results show that the VCO achieves a phase noise of -115.290 dBc/Hz at 1 MHz offset from a center frequency of 5.82 GHz, when tuned at 0 V. A phase noise of -118.350 dBc/Hz at 1 MHz offset from a frequency of 4.754 GHz is achieved when tuned to 1.8 V. The tuning range is 1066 MHz (20.16 %). The circuit consumes 3 mA from a 1.8 V supply.nb_NO
dc.languageengnb_NO
dc.publisherInstitutt for elektronikk og telekommunikasjonnb_NO
dc.subjectntnudaimno_NO
dc.subjectSIE6 elektronikk
dc.subjectKrets- og systemkonstruksjon
dc.title5.8 GHz VCOnb_NO
dc.typeMaster thesisnb_NO
dc.source.pagenumber77nb_NO
dc.contributor.departmentNorges teknisk-naturvitenskapelige universitet, Fakultet for informasjonsteknologi, matematikk og elektroteknikk, Institutt for elektronikk og telekommunikasjonnb_NO


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