| dc.description.abstract | The last two decades have seen a sudden surge of renewing interest in asynchronous (or "clock-less") digital circuit design, along with its introduction into various consumer products in the industry. One major bottleneck to the further advancement of asynchronous design is the inability to integrate it with standard synchronous design. Furthermore, the ease of integration is primarily dictated by the effort spent on timing validation and analyses. It is easier to integrate an asynchronous design into a synchronous tool chain, if no or less timing analyses is required for the asynchronous part. This thesis 1) investigates several asynchronous tools to find an asynchronous tool that nullifies or minimises the timing validation to implement an asynchronous design; 2) uses "Balsa", the selected tool, to implement an asynchronous flash readout; 3) analyzes the delay insensitive nature of Balsa; and 4) integrates a simple asynchronous buffer design in Balsa together with a synchronous RTL design, and runs the combined design through Nordic Semiconductor's synchronous tool chain.
An asynchronous flash readout takes control of the flash and performs readouts from the flash. For this purpose, a Verilog netlist for both single rail and dual rail data encoding styles was generated. An analyses of the delay insensitive (DI) nature of Balsa was performed using a simple buffer design. It was found that for a Balsa generated netlist to be delay insensitive (DI), all the combinatorial loops must be controlled by handshaking signals and all components must be quasi-delay insensitive (QDI).
An attempt to integrate the Balsa Verilog netlist with Nordic Semiconductor's tool chain was made. The correct functionality of the combined design was verified before and after it was synthesized by design compiler (DC). One important feature is that after the synthesis of the combined design, no timing analyses is required to ensure the working of the asynchronous part. A manual inspection of the combined netlist revealed no changes in the functional behaviour for the Balsa part. Therefore, the integration of an asynchronous design written in the Balsa language is possible with Nordic Semiconductor's tool chain. | |
