Blar i Institutt for elektroniske systemer på emneord "Krets- og systemkonstruksjon"
Viser treff 1-20 av 23
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5.8 GHz VCO
(Master thesis, 2006)The explosive growth in wireless communications has led to an increased demand for wireless products that are low-cost, low-power and compact. One approach to meet these demands is the system-on-a-chip (SoC) integration, ... -
A 10 dBm 2.4 GHz CMOS PA
(Master thesis, 2006)This report describes the assessment and design of a 10 dBm 2.4 GHz CMOS PA including driver stage. The PA is designed in a 0.18 um CMOS technology. A three stage PA has been designed due to the high voltage gain needed. ... -
A Boost/Buck Power Supply Regulator with Superior Efficiency
(Master thesis, 2009)Several architectures are studied and a boost/buck power supply is proposed as to achieve superior efficiency. A boost and buck, dual mode converter core and drivers is implemented in a 180 nm cmos technology node and running ... -
A digital audio playback system with USB interface
(Master thesis, 2009)A high performance sound card is designed and implemented using a USB enabled microcontroller and an external dataconverter. Data is retrieved either via USB or S/PDIF. The sampling clock is generated by a precision clock ... -
A Novel Analog Front-End For ECG Acquisition
(Master thesis, 2012)A complete analog front-end for portable ECG systems in 65nm technology was modeled and simulated using Cadence Virtuoso. All the required components for the AFE was incorporated into the continuous-time loop filter of a ... -
A programmable DSP for low-power, low-complexity baseband processing
(Master thesis, 2006)Software defined radio (SDR) is an emerging trend of radio technology. The idea is basically to move software as close to the antenna of a radio system as possible, to improve flexibility, adaptability and time-to-market. ... -
Accurate Delay Test of FPGA Routing Network by Branched Test Paths
(Master thesis, 2007)This Master s thesis documents a new test method for detection of small delay faults in FPGA routing network. The main purpose of the test is accurate detection of faults in all parts of the network. The second aim is ... -
Analyse, dekomponering og rekonstruksjon av FPGA-konfigurasjoner for AHEAD: Ambient Hardware, Embedded Architectures on Demand
(Master thesis, 2006)Utvikling av maskinvare for (re)programmerbar mikroelektronikk har tradisjonelt vært basert på bruk av proprietære DAK-verktøy på alle abstraksjonsnivå. Den tradisjonelle designflyten forutsetter at alle utviklingsaktivitetene ... -
Arkitektur-beskrivelse for AHEAD
(Master thesis, 2006)Rapporten er skrevet fordi AHEAD prosjektet ser behovet for et ADL til automatisk plassering av HW moduler og SW moduler innad på en FPGA. AHEAD er en videretuvikling av Amibesense, men inneholder ingen generell prosessor, ... -
Asynchronous DSP-core
(Master thesis, 2007)In this thesis multipliers with and without completion detection has been implemented using a 90 nm library to compare their properties reguarding completion time, area and power consumption. The structures tested were ... -
Audio decompression software for handheld devices
(Master thesis, 2006)Falanx Microsystems have developed a set of hardware IP cores for graphic acceleration on small, handheld devices. But, a programmable Graphics Processing Unit (GPU) can be used for more than just graphics, and this may ... -
Automated Self-Test of an Analog Delta-Sigma Modulator
(Master thesis, 2007)This project investigates the feasibility of automating the test of ΔΣ-modulators using circuitcomponents available on 8-bit microcontrollers, and by doing so reducing test costs.A Built-In-Self-Test (BIST) scheme, using ... -
AVR32 based Modular Embedded Computer
(Master thesis, 2007)A modular embedded computer system based on the AVR32AP7000 CPU is specified. Existing solutions and earlier work is investigated. -
Batteriovervåking
(Master thesis, 2009)Denne rapporten begynner med å presentere de ulike batteritypene som har vært og er aktuelle å benytte i elbiler. Videre er de ulike kildene til feil vurdert. Måleparametere og vanlige metoder for å korrigere avvik og sikre ... -
CMOS Class D Audio Amplifier Implementations for Microcontroller Circuits
(Master thesis, 2007)A class D amplifier implementation on an AVR 8-bits microcontroller is presented in this thesis. The solution uses a pulse modulation scheme known as uniform sampled pulse width modulation (UPWM). Eight times interpolation ... -
Delay-Fault BIST in Low-Power CMOS Devices
(Master thesis, 2008)Devices such as microcontrollers are often required to operate across a wide range of voltage and temperature. Delay variation in different temperature and voltage corners can be large, and for deep submicron geometries ... -
Design of a 5.8 GHz Multi-Modulus Prescaler
(Master thesis, 2006)A 64-modulus prescaler operating at 5.8 GHz has been designed in a 0.18 μm CMOS process. The prescaler uses a four-phase high-speed ÷4 circuit at the input, composed of two identical cascaded ÷2 circuits implemented in ... -
Design of a high IIP2 2.4GHz RF Front-end
(Master thesis, 2006)This master thesis presents the design of a high IIP2 direct-conversion receiver front-end, consisting of a LNA and I- and Q-channel mixers. The front-end is implemented in a 0.18 μm technology with 1.8V supply voltage. ... -
Design of a low-cost CC-VFC for one-celled Li-Ion batteries
(Master thesis, 2007)The Lithium-ion battery is today used by close to every portable battery powered device, and this marked is constantly increasing because not only are the products the consumer have had for years getting more and more ... -
Network on Chip for FPGA: Development of a test system for Network on Chip
(Master thesis, 2011)Testing and verification of digital systems is an essential part of product develop-ment. The Network on Chip(NoC), as a new paradigm within interconnections;has a specific need for testing. This is to determine how ...