Blar i Institutt for elektroniske systemer på tidsskrift "Integration"
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A loadless 6T SRAM cell for sub- & near- threshold operation implementedin 28 nm FD-SOI CMOS technology
(Journal article; Peer reviewed, 2018)Most ultra low power SRAM cells operating in the sub and near threshold region deploy 8 or more transistors per storage cell to ensure stability. In this paper we propose and design a low voltage, differential write, single ...